The demands of power-constrained mobile and embedded computing applications increase rapidly. Reducing power consumption hence becomes a crucial challenge for today's software and hardware developers. While maximization of battery life is an obvious goal, the reduction of heat dissipation is important as well. The reduction of power consumption is an objective similar to the reduction of heat dissipation. Minimization of power dissipation can be considered at algorithmic, architectural, logic and circuit levels. Studies on low power design are abundant in the literature in which various techniques have been proposed to synthesize designs with low transitional activities. Recently, new research directions in reducing power consumption have begun to address the issues on the aspect of architecture designs and on software arrangements at instruction-level to help reduce power consumption. The architecture and software efforts to reduce energy consumption in recent attempts have been primarily on the dynamic component of power dissipation (also known as dynamic power).
Various techniques have been proposed to reduce the power consumption of processors. These techniques include increasing the integration of circuitry and incorporation of improved circuitry and power management units (PMUs). One specific power reduction technique employed in processors generally involves the capability of stopping clock signals that drive inactive circuit portions. A system employing such a technique typically includes a power management unit that detects or predicts inactive circuit portions and accordingly stops the clock signals associated with the inactive circuit portions. By turning off “unused” clock signals that drive inactive circuit portions, overall power consumption of the system is decreased. A similar technique involves the capability of reducing the frequency of clock signals that drive circuit portions during operating modes, which are not time critical, and another technique involves the capability of removing power from inactive circuit portions.